logo

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9830995 B1

PDFFull Text
Date of Patent:
Nov. 28, 2017

Filed:

Apr. 28, 2016

Circuit and method for biasing nonvolatile memory cells

Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventors:

Fabio Enrico Carlo Disegni, Spino D'adda, IT;

Giuseppe Castagna, Palermo, IT;

Maurizio Francesco Perroni, Furnari, IT;

Assignee:

STMICROELECTRONICS S.R.L., Agrate Brianza (MB), IT;

Attorney:

Slater Matsil, LLP

Primary Examiner:

Hoai V Ho

Assistant Examiner:

Muna A Techane

Int. Cl.
CPC ...
G11C 16/28 (2006.01); G05F 3/24 (2006.01); G11C 5/14 (2006.01); G11C 7/12 (2006.01); G11C 7/14 (2006.01); G11C 16/24 (2006.01); G11C 16/30 (2006.01); G11C 16/08 (2006.01); G11C 16/10 (2006.01); G11C 16/14 (2006.01); G11C 7/04 (2006.01); G11C 8/10 (2006.01);
U.S. Cl.
CPC ...
G11C 16/28 (2013.01); G05F 3/245 (2013.01); G11C 5/147 (2013.01); G11C 7/12 (2013.01); G11C 7/14 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01); G11C 16/14 (2013.01); G11C 16/24 (2013.01); G11C 16/30 (2013.01); G11C 7/04 (2013.01); G11C 8/10 (2013.01);
Abstract

A circuit for biasing non-volatile memory cells includes a dummy decoding path between a global bias line and a biasing node, a reference current generator coupled to the dummy decoding path and configured to supply a reference current, a biasing stage configured to set a cell bias voltage on the biasing node, and a compensation stage configured to compensate a current absorption of the biasing stage at the biasing node so that the reference current will flow through the dummy decoding path.

Find Patent Forward Citations

Disegni, Fabio Enrico Carlo. (2017). Circuit and method for biasing nonvolatile memory cells (U.S. Patent No. 9830995). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9830995

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…