Neuromorphic memory circuit using a leaky integrate and fire (lif) line to transmit axon lif pulse and a conductive denrite lif line

Abstract

A neuromorphic memory circuit including a programmable resistive memory element, an axon LIF line to transmit an axon LIF pulse, and a dendrite LIF line to build up a dendrite LIF charge over time. A first transistor provides a discharge path for the dendrite LIF charge through the programmable resistive memory element when the axon LIF line transmits the axon LIF pulse. An axon STDP line transmits an axon STDP pulse. The axon STDP pulse is longer than the axon LIF pulse. A dendrite STDP line is configured to transmit a dendrite STDP pulse after voltage at the dendrite LIF line falls below a threshold voltage. A second transistor is coupled to the axon STDP line and the programmable resistive memory element. The second transistor provides an electrical path for the dendrite STDP pulse through the programmable resistive memory element when the axon STDP line transmits the axon STDP pulse.