The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2017

Filed:

Oct. 14, 2015
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Gilbert Wolrich, Farmingham, MA (US);

Debra Bernstein, Sudbury, MA (US);

Daniel Cutter, Townsend, MA (US);

Christopher Dolan, Milford, MA (US);

Matthew J. Adiletta, Worcester, MA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/20 (2006.01); G06F 12/0806 (2016.01); G06F 12/06 (2006.01); G06F 12/02 (2006.01); G06F 3/06 (2006.01); G06F 13/28 (2006.01); G06F 13/40 (2006.01); G06F 15/76 (2006.01); G06F 15/173 (2006.01); G11C 7/10 (2006.01); G06F 12/10 (2016.01); G06F 12/109 (2016.01);
U.S. Cl.
CPC ...
G06F 13/20 (2013.01); G06F 3/0622 (2013.01); G06F 3/0661 (2013.01); G06F 3/0679 (2013.01); G06F 12/0223 (2013.01); G06F 12/0284 (2013.01); G06F 12/06 (2013.01); G06F 12/0806 (2013.01); G06F 13/28 (2013.01); G06F 13/4027 (2013.01); G06F 15/17318 (2013.01); G06F 15/76 (2013.01); G11C 7/1033 (2013.01); G11C 7/1072 (2013.01); G06F 12/10 (2013.01); G06F 12/109 (2013.01); G06F 2212/1041 (2013.01); G06F 2212/206 (2013.01); G06F 2212/251 (2013.01);
Abstract

The disclosure includes, in general, among other aspects, an apparatus having multiple programmable units integrated within a processor. The apparatus has circuitry to map addresses in a single address space to resources within the multiple programmable units where the single address space includes addresses for different ones of the resources in different ones of the multiple programmable units and where there is a one-to-one correspondence between respective addresses in the single address space and resources within the multiple programmable units.


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