The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2017

Filed:

Jun. 16, 2016
Applicant:

Intel Ip Corporation, Santa Clara, CA (US);

Inventors:

Pouyan Parvazi, Dresden, DE;

Tianyan Pu, Santa Clara, CA (US);

Assignee:

INTEL IP CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04J 11/00 (2006.01); H04W 72/04 (2009.01); H04L 5/14 (2006.01); H04W 84/12 (2009.01); H04W 56/00 (2009.01); H04W 48/16 (2009.01);
U.S. Cl.
CPC ...
H04W 72/042 (2013.01); H04J 11/0069 (2013.01); H04J 11/0089 (2013.01); H04L 5/14 (2013.01); H04J 11/0073 (2013.01); H04J 11/0076 (2013.01); H04W 48/16 (2013.01); H04W 56/00 (2013.01); H04W 84/12 (2013.01);
Abstract

A circuit arrangement may include a first detection circuit configured to evaluate signal data of a carrier channel to identify a timing location of a synchronization signal within the signal data, a second detection circuit configured to, using the timing location as a reference point, extract a first candidate synchronization signal from a first candidate timing location of the signal data and to extract a second candidate synchronization signal from a second candidate timing location of the signal data, and a decision circuit configured to analyze the first detection synchronization signal and the second candidate synchronization signal to determine a duplex mode of the carrier channel.


Find Patent Forward Citations

Loading…