The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9818913 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 14, 2017

Filed:

Jan. 31, 2017
Applicant:

Point Engineering Co., Ltd., Asan-si, Chungcheongnam-do, KR;

Inventors:

Ki Myung Nam, Cheonan-si, KR;

Young Woon Jeon, Ansan-si, KR;

Kyoung Ja Yun, Cheonan-si, KR;

Assignee:

Point Engineering Co., Ltd., Asan-si, Chungcheongnam-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 33/54 (2010.01); H01L 33/44 (2010.01); H01L 33/62 (2010.01); H01L 33/48 (2010.01); H01L 33/58 (2010.01);
U.S. Cl.
CPC ...
H01L 33/486 (2013.01); H01L 33/44 (2013.01); H01L 33/54 (2013.01); H01L 33/58 (2013.01); H01L 33/62 (2013.01); H01L 2933/0025 (2013.01); H01L 2933/0033 (2013.01); H01L 2933/0066 (2013.01);
Abstract

A chip substrate includes at least one insulation portion interposed between conductive portions. A cavity formed in a recessed shape from a region of an upper surface of the chip substrate exposes a top surface of a part of the at least one insulation portion. An insulation layer is coated on the upper surface of the chip substrate excluding the region of the cavity. A bump may be formed at a predetermined height within the cavity.


Find Patent Forward Citations

Nam, Ki. (2017). Chip substrate (U.S. Patent No. 9818913). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9818913

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