The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9818474 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 14, 2017

Filed:

Mar. 25, 2016
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Taiwan, Republic of China, TW;

Inventor:

Kuoyuan Hsu, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/28 (2006.01); G11C 11/419 (2006.01); G11C 11/412 (2006.01); G05F 3/26 (2006.01); G11C 16/26 (2006.01); G11C 11/56 (2006.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01); G05F 3/262 (2013.01); G11C 11/412 (2013.01); G11C 11/5642 (2013.01); G11C 16/26 (2013.01); G11C 16/28 (2013.01);
Abstract

A memory device with a keeper circuit is disclosed herein. The memory device (i) improves current tracking between the device's memory cells and the keeper circuit, (ii) improves Vccmin for memory operations, and (iii) has an efficient circuit layout. The memory device includes a memory array with a plurality of bitlines coupled to the memory cells. The keeper circuit includes a plurality of switches and a current mirror circuit. The plurality of switches is respectively coupled to the plurality of bitlines. The current mirror circuit mirrors a bias current to a plurality of current mirror transistors respectively coupled to the plurality of switches.


Find Patent Forward Citations

Hsu, Kuoyuan. (2017). Memory with keeper circuit (U.S. Patent No. 9818474). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9818474

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