The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2017

Filed:

Sep. 13, 2016
Applicant:

Toshiba Memory Corporation, Minato-ku, Tokyo, JP;

Inventors:

Nao Matsuoka, Tokyo, JP;

Kosuke Hatsuda, Tokyo, JP;

Katsuhiko Hoya, Yokohama Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 11/16 (2006.01); G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 11/1673 (2013.01); G11C 11/1675 (2013.01); G11C 13/0007 (2013.01); G11C 13/0011 (2013.01); G11C 13/0061 (2013.01); G11C 13/0069 (2013.01);
Abstract

According to one embodiment, a semiconductor memory device includes: a first bit line; a first source line; a first word line; a first control line; a first memory cell comprising a first variable resistance element and a first transistor, the first transistor including a gate coupled to the first word line, the first memory cell including one end coupled to the first bit line and another end coupled to the first source line; a second transistor including one end coupled to the first bit line; and a third transistor including a gate coupled to the first control line, one end coupled to the first bit line, and another end coupled to the first source line.


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