The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 07, 2017

Filed:

Sep. 09, 2016
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Kazutaka Takizawa, Yokohama, JP;

Chao Wang, Kamakura, JP;

Masaaki Niijima, Machida, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/16 (2006.01); G11C 16/34 (2006.01); G11C 16/10 (2006.01); G11C 16/26 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3495 (2013.01); G11C 16/10 (2013.01); G11C 16/16 (2013.01); G11C 16/26 (2013.01); G11C 16/3445 (2013.01);
Abstract

According to one embodiment, a memory device includes a controller, and a nonvolatile memory in which an erase operation is controlled by the controller, the nonvolatile memory including blocks, the erase operation executing every block, the nonvolatile memory transferring a first reply showing a completion of the erase operation and a fail bit count showing a number of memory cells in which a data erase is uncompleted after the completion of the erase operation to the controller. The controller selects a target block as a target of the erase operation based on the fail bit count.


Find Patent Forward Citations

Takizawa, Kazutaka. (2017). Memory device that executes an erase operation for a nonvolatile memory (U.S. Patent No. 9812215). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9812215

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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