The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 31, 2017

Filed:

Jun. 26, 2015
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Andres Bryant, Burlington, VT (US);

Edward J. Nowak, Shelburne, VT (US);

Robert R. Robison, Colchester, VT (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/84 (2006.01); G05F 3/16 (2006.01); H01L 29/786 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 21/845 (2013.01); G05F 3/16 (2013.01); H01L 21/84 (2013.01); H01L 27/1203 (2013.01); H01L 29/78696 (2013.01); H01L 27/1211 (2013.01);
Abstract

An integrated circuit having a reference device and method of forming the same. A reference device is disclosed having: a fully depleted n-type MOSFET implemented as a long channel device having a substantially undoped body; and a fully depleted p-type MOSFET implemented with as a long channel device having a substantially undoped body; wherein the n-type MOSFET and p-type MOSFET are connected in series and employ identical gate stacks, wherein each has a gate electrically coupled to a respective drain to form two diodes, and wherein both diodes are in one of an on state and an off state according to a value of an electrical potential applied across the n-type MOSFET and p-type MOSFET.


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