The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 31, 2017

Filed:

Sep. 25, 2016
Applicant:

Ememory Technology Inc., Hsin-Chu, TW;

Inventors:

Hsueh-Wei Chen, Hsinchu, TW;

Wei-Ren Chen, Pingtung County, TW;

Wein-Town Sun, Taoyuan, TW;

Assignee:

eMemory Technology Inc., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 16/14 (2006.01); H01L 29/423 (2006.01); H01L 29/45 (2006.01); H01L 29/78 (2006.01); H01L 29/788 (2006.01);
U.S. Cl.
CPC ...
G11C 16/14 (2013.01); H01L 29/42328 (2013.01); H01L 29/452 (2013.01); H01L 29/7834 (2013.01); H01L 29/7881 (2013.01); H01L 29/7885 (2013.01);
Abstract

A non-volatile memory cell includes a substrate, a select gate, a floating gate, and an assistant control gate. The substrate includes a first diffusion region, a second diffusion region, a third diffusion region, and a fourth diffusion region. The select gate is formed above the first diffusion region and the second diffusion region in a polysilicon layer. The floating gate is formed above the second diffusion region, the third diffusion region and the fourth diffusion region in the polysilicon layer. The assistant control gate is formed above the floating gate in a metal layer, wherein an area of the assistant control gate overlaps with at least half an area of the floating gate.


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