The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 17, 2017

Filed:

Jun. 20, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Tawfiq Musah, Hillsboro, OR (US);

Gokce Keskin, Hillsboro, OR (US);

Ganesh Balamurugan, Urbana, IL (US);

James E. Jaussi, Hillsboro, OR (US);

Bryan K. Casper, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 25/03 (2006.01); H04L 7/00 (2006.01); H04L 25/14 (2006.01); H04L 7/033 (2006.01);
U.S. Cl.
CPC ...
H04L 25/03057 (2013.01); H04L 7/0058 (2013.01); H04L 7/0087 (2013.01); H04L 25/03146 (2013.01); H04L 25/14 (2013.01); H04L 7/033 (2013.01);
Abstract

Some embodiments include apparatus and methods having an input to receive an input signal, additional inputs to receive clock signals having different phases to sample the input signal, and a decision feedback equalizer (DFE) having DFE slices. The DFE slices include a number of data comparators to provide data information based on the sampling of the input signal, and a number of phase error comparators to provide phase error information associated with the sampling of the input signal. The number of phase error comparators of the DFE slices is not greater than the number of data comparators of the DFE slices.


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