The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 17, 2017

Filed:

Sep. 01, 2014
Applicant:

Peking University Shenzhen Graduate School, Shenzhen, CN;

Inventors:

Haijun Lou, Shenzhen, CN;

Xinnan Lin, Shenzhen, CN;

Dan Li, Shenzhen, CN;

Jin He, Shenzhen, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/10 (2006.01); H01L 29/739 (2006.01); H01L 29/06 (2006.01); H01L 29/165 (2006.01); H01L 29/08 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/1033 (2013.01); H01L 29/0673 (2013.01); H01L 29/0676 (2013.01); H01L 29/0688 (2013.01); H01L 29/0847 (2013.01); H01L 29/165 (2013.01); H01L 29/7391 (2013.01); H01L 29/78 (2013.01); H01L 29/7827 (2013.01);
Abstract

A tunneling field effect transistor, comprising a gate electrode layer, a gate dielectric layer, a source region, a connected region and a drain region, wherein the source region comprises a first source region and a second source region, the second source region comprising an inner layer source region and an outer layer source region. The connected region comprises an expansion region and a high-resistance region. The doping types of materials of the inner layer source and the outer layer source region are opposite, and the forbidden bandwidth of the material of the inner layer source region is less than that of the outer layer source region. The contact surface formed by way of covering the inner layer source region by the outer layer source region is a curved surface. Since a contact surface of an outer layer source region and an inner layer source region of a tunneling field effect transistor is of a curved surface structure, the contact area of the outer layer source region and the inner layer source region is increased, and the probability of tunneling of a carrier through the contact surface is increased. Therefore, the On-state current is increased, thereby having a good current drive capability.


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