The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 17, 2017
Filed:
Jun. 15, 2016
Intel Corporation, Santa Clara, CA (US);
Shantanu R. Rajwade, Sunnyvale, CA (US);
Pranav Kalavade, San Jose, CA (US);
Neal R. Mielke, Los Altos Hills, CA (US);
Krishna K. Parat, Palo Alto, CA (US);
Shyam Sunder Raghunathan, Sunnyvale, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
The inhibit voltage is a voltage applied to wordlines adjacent to a program wordline having a memory cell to write during the program operation. The inhibit voltage for a program operation can be ramped up during the program pulse. Instead of applying a constant high inhibit voltage that results in the initial boosted channel potential reducing drastically due to leakage, a system can start the inhibit voltage lower and ramp the inhibit voltage up during the program pulse. The ramping up can be a continuous ramp or in finite discrete steps during the program pulse. Such ramping of inhibit voltage can provide better tradeoff between program disturb and inhibit disturb.