The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 17, 2017
Filed:
Jun. 30, 2015
Cadence Design Systems, Inc., San Jose, CA (US);
Meir Ovadia, Rosh Ha-ayin, IL;
Kalev Alpernas, Modi'in, IL;
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
A method for debugging a system on chip (SoC) under test, the method may include executing a test code on the SoC, the test code designed to invoke a plurality of actions; recording output data from the SoC resulting from the executed test code; linking between actions detected in the recorded output data and actions of the plurality of actions of the test code by identifying a start and an end times of each of the detected actions in the recorded output data, and associating the identified start and end times with a start and an end times of actions of the plurality of actions of the test code; and causing display, via a graphical user interface, of a waveform representation of the detected actions over time, a representation of the test code and a representation of the output log.