The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 17, 2017

Filed:

Jan. 07, 2013
Applicants:

Asher Berkovitz, Kiryat Ono, IL;

Inbar Ben-porat, Petach-Tiqva, IL;

Yossy Neeman, Gedera, IL;

Inventors:

Asher Berkovitz, Kiryat Ono, IL;

Inbar Ben-Porat, Petach-Tiqva, IL;

Yossy Neeman, Gedera, IL;

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5072 (2013.01); G06F 17/5077 (2013.01); G06F 17/5081 (2013.01);
Abstract

An integrated circuit hierarchical design tool apparatus comprises a processor arranged to support a block coupling reconfiguration unit. The block coupling reconfiguration unit is capable of receiving block layout data comprising block placement, terminal location data and intra-block connectivity data. The block coupling reconfiguration unit is arranged to identify from the block layout data a block placement level block having a terminal respectively coupled to a plurality of other block placement level blocks by a plurality of nets, and to provide the block with an additional terminal capable of providing the same function as the terminal. The block coupling reconfiguration unit is also arranged to replace a net of the plurality of nets that is coupled to the terminal with a replacement net coupled to the additional terminal.


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