The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9786755 B1

PDF
Full Text
Expired
Date of Patent:
Oct. 10, 2017

Filed:

Nov. 02, 2015
Applicant:

Stmicroelectronics (Crolles 2) Sas, Crolles, FR;

Inventors:

Dominique Golanski, Gieres, FR;

Gregory Bidal, Grenoble, FR;

Simon Jeannot, Grenoble, FR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/84 (2006.01); H01L 29/423 (2006.01); H01L 27/12 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/788 (2006.01);
U.S. Cl.
CPC ...
H01L 29/42364 (2013.01); H01L 27/12 (2013.01); H01L 27/1207 (2013.01); H01L 29/0649 (2013.01); H01L 29/0847 (2013.01); H01L 29/66545 (2013.01); H01L 29/7838 (2013.01); H01L 29/7881 (2013.01);
Abstract

An integrated circuit includes a first zone for a first transistor and a second zone for a second transistor. The transistors are supported by a substrate of the silicon-on-insulator type that includes a semiconductor film on a buried insulating layer on a carrier substrate. In the second zone, the semiconductor film has been removed. The second transistor in the second zone includes a gate-dielectric region resting on the carrier substrate that is formed by a portion of the buried insulating layer). The first transistor in the first zone includes a gate-dielectric region formed by a dielectric layer on the semiconductor film.


Find Patent Forward Citations

Golanski, Dominique. (2017). Process for producing, from an soi and in particular an fdsoi type substrate, transistors having gate oxides of different thicknesses, and corresponding integrated circuit (U.S. Patent No. 9786755). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9786755

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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