The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 10, 2017
Filed:
Nov. 05, 2013
Applicant:
Analog Devices Global, Hamilton, BM;
Inventors:
Oliver J Kierse, Killaloe, IE;
Frank Poucher, Raheen, IE;
Michael J Cusack, Limerick City, IE;
Padraig L Fitzgerald, Mallow, IE;
Patrick Elebert, Nenagh, IE;
Assignee:
ANALOG DEVICES GLOBAL, Hamilton, BM;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/28 (2006.01); H01L 23/00 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/16 (2006.01); H01L 23/29 (2006.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 21/56 (2013.01); H01L 23/16 (2013.01); H01L 23/295 (2013.01); H01L 23/31 (2013.01); H01L 23/3107 (2013.01); H01L 2224/05554 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/49113 (2013.01); H01L 2224/73265 (2013.01);
Abstract
A stress shield for a plastic integrated circuit package is disclosed. A shield plate is attached by an adhesive to a top surface of an integrated circuit die such that the shield plate covers less than all of the top surface and leaves bond pads exposed. A molding material is applied over the shield plate and the integrated circuit die. The shield plate shields the integrated circuit die from stresses imparted by the molding material.