The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 10, 2017
Filed:
Sep. 25, 2009
Applicants:
Hidenobu Fukutome, Kawasaki, JP;
Mitsugu Tajima, Kawasaki, JP;
Inventors:
Assignee:
FUJITSU SEMICONDUCTOR LIMITED, Yokohama, JP;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/088 (2006.01); H01L 21/8238 (2006.01); H01L 21/28 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823842 (2013.01); H01L 21/28035 (2013.01); H01L 21/823807 (2013.01); H01L 29/4925 (2013.01); H01L 29/66636 (2013.01); H01L 29/7845 (2013.01); H01L 29/7848 (2013.01); H01L 29/7833 (2013.01); H01L 29/7834 (2013.01);
Abstract
A semiconductor device includes a transistor configuration including first and second gate electrodes, each of the first and second gate electrodes having at least a bottom layer and an upper layer including polycrystalline silicon grains, wherein the first gate electrode is a nMOS gate electrode formed in an nMOS region of the transistor configuration, wherein the polycrystalline silicon grains included in the bottom layer of the first gate electrode have a greater particle diameter than the polycrystalline grains included in the upper layer of the second gate electrode.