The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2017

Filed:

Nov. 24, 2016
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Sheng Zhang, Singapore, SG;

Wenbo Ding, Singapore, SG;

Xiaofei Han, Singapore, SG;

Chien-Kee Pang, Singapore, SG;

Yu-Yang Chen, Singapore, SG;

Jubao Zhang, Singapore, SG;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01); H01L 21/336 (2006.01); H01L 29/788 (2006.01); H01L 27/11521 (2017.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11521 (2013.01); H01L 29/66825 (2013.01); H01L 29/788 (2013.01);
Abstract

The present invention provides a flash cell structure and a method of fabricating the same. The flash cell structure includes a semiconductor substrate, a stacked gate structure disposed on the semiconductor substrate, a first doped region disposed in the semiconductor substrate at a side of the stacked gate structure, a first dielectric layer, a second dielectric layer, and an erase gate. The stacked gate structure includes a floating gate insulated from the semiconductor substrate and a control gate disposed on the floating gate and insulated from the floating gate. The first dielectric layer is disposed on a sidewall of the floating gate. The second dielectric layer is disposed on the first doped region. A thickness of the first dielectric layer is less than a thickness of the second dielectric layer.


Find Patent Forward Citations

Loading…