The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2017

Filed:

Sep. 10, 2015
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Zhi-Sheng Zheng, New Taipei, TW;

Chih-Lin Wang, Hsinchu County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); H01L 21/76802 (2013.01); H01L 21/76834 (2013.01); H01L 21/76883 (2013.01); H01L 23/5329 (2013.01); H01L 21/76885 (2013.01); H01L 2924/0002 (2013.01);
Abstract

An interconnection structure includes a first dielectric layer, a first conductor, an etch stop layer, a second dielectric layer, and a second conductor. The first dielectric layer has at least one hole therein. The first conductor is disposed at least partially in the hole of the first dielectric layer. The etch stop layer is disposed on the first dielectric layer. The etch stop layer has an opening to at least partially expose the first conductor. The second dielectric layer is disposed on the etch stop layer and has at least one hole therein. The hole of the second dielectric layer is in communication with the opening of the etch stop layer. The second conductor is disposed at least partially in the hole of the second dielectric layer and is electrically connected to the first conductor through the opening of the etch stop layer.


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