The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 26, 2017
Filed:
Dec. 16, 2015
Applicant:
Micron Technology, Inc., Boise, ID (US);
Inventors:
Marcello Ravasio, Olgiate Molgora, IT;
Samuele Sciarrillo, Lomagna, IT;
Roberto Somaschini, Vimercate, IT;
Gabriel L. Donadio, Alghero, IT;
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/24 (2006.01); G11C 13/00 (2006.01); H01L 45/00 (2006.01); G11C 5/06 (2006.01);
U.S. Cl.
CPC ...
H01L 27/2481 (2013.01); G11C 5/063 (2013.01); H01L 27/2409 (2013.01); H01L 45/06 (2013.01); H01L 45/1233 (2013.01); H01L 45/141 (2013.01); H01L 45/1608 (2013.01); H01L 45/1666 (2013.01); H01L 45/1675 (2013.01); G11C 13/0002 (2013.01); G11C 2213/71 (2013.01);
Abstract
The present disclosure includes memory cell array structures and methods of forming the same. One such array includes a stack structure comprising a memory cell between a first conductive material and a second conductive material. The memory cell can include a select element and a memory element. The array can also include an electrically inactive stack structure located at an edge of the stack structure.