The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 26, 2017

Filed:

Dec. 22, 2015
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Mark Melone, Frankfort, IL (US);

Saeed Shojaie, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H05K 1/14 (2006.01); H01L 21/00 (2006.01); H01L 25/16 (2006.01); H01L 25/00 (2006.01); H01L 23/498 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 25/162 (2013.01); H01L 21/565 (2013.01); H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 23/3107 (2013.01); H01L 23/481 (2013.01); H01L 23/49833 (2013.01); H01L 23/49838 (2013.01); H01L 25/50 (2013.01);
Abstract

One or more example embodiments of miniaturized electric devices are disclosed. In some example embodiments, the electric device includes a first thin substrate layer and a second thin substrate layer positioned above the first thin substrate layer. The electric device further includes one or more components electrically coupled to the first thin substrate layer. An overmold compound is deposited covering the one or more components between the first thin substrate and the second thin substrate. The electric device further includes one or more through mold vias that electrically and communicatively connect the first thin substrate layer and the second thin substrate layer.


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