The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 26, 2017
Filed:
Mar. 11, 2016
Applicant:
Zing Semiconductor Corporation, Shanghai, CN;
Inventors:
Deyuan Xiao, Shanghai, CN;
Richard R. Chang, Shanghai, CN;
Assignee:
ZING SEMICONDUCTOR CORPORATION, Shanghai, CN;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0262 (2013.01); H01L 21/0217 (2013.01); H01L 21/0254 (2013.01); H01L 21/02164 (2013.01); H01L 21/02381 (2013.01); H01L 21/02488 (2013.01); H01L 21/02543 (2013.01); H01L 21/02546 (2013.01); H01L 21/02549 (2013.01); H01L 21/02631 (2013.01); H01L 21/31116 (2013.01);
Abstract
A method for making III-V-on-insulator on large-area Si Substrate wafer by confined epitaxial lateral overgrowth (CELO) has been disclosed. This method, based on selective epitaxy, starting from defining an epitaxy seed window to the Si substrate in a thermal oxide, from which the III-V material will grow.
Quick Actions:
Xiao, Deyuan. (2017). Method of preparation of iii-v compound layer on large area si insulating substrate (U.S. Patent No. 9773670). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9773670
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile