The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 26, 2017

Filed:

Dec. 16, 2014
Applicant:

Macronix International Co., Ltd., Hsinchu, TW;

Inventors:

Chi Lo, Hsinchu, TW;

Shuo-Nan Hung, Jhubei, TW;

Chun-Hsiung Hung, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G11C 29/00 (2006.01);
U.S. Cl.
CPC ...
G11C 29/78 (2013.01); G11C 29/76 (2013.01); G06F 2201/85 (2013.01);
Abstract

An integrated circuit including a memory, an array cache, and a cache replacement store is described. The memory includes a primary array and a redundant array. The integrated circuit also includes circuitry configured to transfer data into or out of the primary array using the array cache. For defective locations in the array cache, the circuitry is configured to use the cache replacement store in the transfer of data in place of the defective locations in the array cache, and map addresses in the primary array corresponding to the defective locations in the cache array to the redundant array.


Find Patent Forward Citations

Lo, Chi. (2017). Memory repair redundancy with array cache redundancy (U.S. Patent No. 9773571). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9773571

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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