The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 19, 2017
Filed:
Mar. 15, 2013
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Jose S. Niell, Franklin, MA (US);
Daniel F. Cutter, Maynard, MA (US);
James D. Allen, Austin, TX (US);
Deepak Limaye, Austin, TX (US);
Shadi T. Khasawneh, Austin, TX (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2016.01); G06F 12/10 (2016.01); G06F 12/0831 (2016.01); G06F 12/1027 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0831 (2013.01); G06F 12/1027 (2013.01); Y02B 60/1225 (2013.01);
Abstract
In one embodiment, a conflict detection logic is configured to receive a plurality of memory requests from an arbiter of a coherent fabric of a system on a chip (SoC). The conflict detection logic includes snoop filter logic to downgrade a first snooped memory request for a first address to an unsnooped memory request when an indicator associated with the first address indicates that the coherent fabric has control of the first address. Other embodiments are described and claimed.