The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 19, 2017

Filed:

Jun. 10, 2013
Applicant:

Freescale Semiconductor, Inc., Austin, TX (US);

Inventors:

Perry H. Pelley, Austin, TX (US);

Tab A. Stephens, Austin, TX (US);

Michael B. McShane, Austin, TX (US);

Assignee:

NXP USA, INC., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B 6/26 (2006.01); G02B 6/42 (2006.01); G02B 6/35 (2006.01); G02B 26/08 (2006.01);
U.S. Cl.
CPC ...
G02B 6/3502 (2013.01); G02B 6/3562 (2013.01); G02B 6/3596 (2013.01); G02B 6/357 (2013.01); G02B 26/0833 (2013.01);
Abstract

A high density, low power, high performance information system, method and apparatus are described in which an integrated circuit apparatus includes a first integrated circuit link element () and a redundant integrated circuit link element () connected in parallel between first and second deflectable MEMS switches (--) which are connected in a signal path and controlled to deselect the first integrated circuit link element () and connect the redundant integrated circuit link element () in the signal path in response to a two-state control signal provided to the first and second deflectable MEMs switches which identifies the first integrated circuit link element as being defective.


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