The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 12, 2017

Filed:

Oct. 19, 2012
Applicant:

Rf Micro Devices, Inc., Greensboro, NC (US);

Inventors:

Brian G. Moser, Jamestown, NC (US);

Michael T. Fresina, Greensboro, NC (US);

Assignee:

Qorvo US, Inc., Greensboro, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 29/737 (2006.01); H01L 29/08 (2006.01); H01L 29/201 (2006.01); H01L 29/205 (2006.01); H01L 29/207 (2006.01);
U.S. Cl.
CPC ...
H01L 29/41708 (2013.01); H01L 29/0817 (2013.01); H01L 29/42304 (2013.01); H01L 29/66318 (2013.01); H01L 29/7371 (2013.01); H01L 29/201 (2013.01); H01L 29/205 (2013.01); H01L 29/207 (2013.01);
Abstract

Embodiments of semiconductor structure are disclosed along with methods of forming the semiconductor structure. In one embodiment, the semiconductor structure includes a semiconductor substrate, a collector layer formed over the semiconductor substrate, a base layer formed over the semiconductor substrate, and an emitter layer formed over the semiconductor substrate. The semiconductor substrate is formed from Gallium Arsenide (GaAs), while the base layer is formed from a Gallium Indium Nitride Arsenide Antimonide (GaInNAsSb) compound. The base layer formed from the GaInNAsSb compound has a low bandgap, but a lattice that substantially matches a lattice constant of the underlying semiconductor substrate formed from GaAs. In this manner, semiconductor devices with lower base resistances, turn-on voltages, and/or offset voltages can be formed using the semiconductor structure.


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