The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 12, 2017

Filed:

Dec. 30, 2015
Applicant:

Freescale Semiconductor Inc., Austin, TX (US);

Inventor:

Weng F. Yap, Chandler, AZ (US);

Assignee:

NSP USA, INC., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 25/16 (2006.01); H01L 23/12 (2006.01); H01L 23/00 (2006.01); H05K 1/18 (2006.01); H05K 1/02 (2006.01); H01L 21/56 (2006.01); H01L 23/538 (2006.01); H01L 25/10 (2006.01); H01L 23/31 (2006.01); H01L 25/065 (2006.01); H01L 25/18 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 25/16 (2013.01); H01L 21/56 (2013.01); H01L 21/561 (2013.01); H01L 23/12 (2013.01); H01L 23/3107 (2013.01); H01L 23/49548 (2013.01); H01L 23/49575 (2013.01); H01L 23/49589 (2013.01); H01L 23/5389 (2013.01); H01L 24/19 (2013.01); H01L 24/96 (2013.01); H01L 24/97 (2013.01); H01L 25/0657 (2013.01); H01L 25/105 (2013.01); H01L 25/165 (2013.01); H05K 1/0284 (2013.01); H05K 1/181 (2013.01); H01L 21/568 (2013.01); H01L 23/49816 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 25/18 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/24175 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/97 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06572 (2013.01); H01L 2225/06582 (2013.01); H01L 2225/107 (2013.01); H01L 2225/1029 (2013.01); H01L 2225/1035 (2013.01); H01L 2225/1064 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/1203 (2013.01); H01L 2924/1205 (2013.01); H01L 2924/1206 (2013.01); H01L 2924/1207 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/181 (2013.01); H05K 2201/1003 (2013.01); H05K 2201/10015 (2013.01); H05K 2201/10022 (2013.01); H05K 2201/10174 (2013.01); Y10T 29/41 (2015.01); Y10T 29/49126 (2015.01); Y10T 29/49139 (2015.01);
Abstract

Embodiments of a method for fabricating System-in-Packages (SiPs) are provided, as are embodiments of a SiP. In one embodiment, the method includes producing a first package including a first molded package body having a sidewall. A first leadframe is embedded within the first molded package body and having a first leadframe lead exposed through the sidewall. In certain implementations, a semiconductor die may also be encapsulated within the first molded package body. A Surface Mount Device (SMD) is mounted to the sidewall of the first molded package body such that a first terminal of the SMD is in ohmic contact with the first leadframe lead exposed through the sidewall.


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