The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 12, 2017

Filed:

Mar. 14, 2016
Applicant:

Stmicroelectronics, Inc, Calamba, Laguna, PH;

Inventors:

Rennier Rodriguez, Bulacan, PH;

Frederick Arellano, Pulo Cabuyao Laguna, PH;

Aiza Marie Agudon, Calamba, PH;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/78 (2006.01); H01L 23/552 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/29 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); H01L 21/4814 (2013.01); H01L 21/561 (2013.01); H01L 21/78 (2013.01); H01L 23/29 (2013.01); H01L 23/3135 (2013.01);
Abstract

A method for making shielded integrated circuit (IC) packages includes providing spaced apart IC dies carried by a substrate and covered by a common encapsulating material, and cutting through the common encapsulating material between adjacent IC dies to define spaced apart IC packages carried by the substrate. An electrically conductive layer is positioned over the spaced apart IC packages and fills spaces between adjacent IC packages. The method further includes cutting through the electrically conductive layer between adjacent IC packages and through the substrate to form the shielded IC packages.


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