The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 12, 2017

Filed:

Oct. 14, 2015
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventor:

Debaleena Das, Los Gatos, CA (US);

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/00 (2006.01); G06F 11/10 (2006.01); G11C 29/52 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1068 (2013.01); G06F 3/064 (2013.01); G06F 3/0619 (2013.01); G06F 3/0679 (2013.01); G11C 29/52 (2013.01);
Abstract

Provided are an apparatus and method for generating common locator bits to locate a device or column error during error correction operation for a memory subsystem having memory modules, each including a plurality of memory devices. Error detection logic generates common locator bits from device bits in a plurality of memory devices in one of the memory modules. The error detection logic uses the common locator bits to locate a column across at least two of the memory devices having an error when there is a column error and to locate a memory device in the devices having an error when there is a device error. A same of the common locator bits are used to locate both one of the columns and the memory devices having errors. Error correction is performed on the located memory device or column having the error.


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