The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 05, 2017

Filed:

Sep. 22, 2015
Applicant:

Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;

Inventors:

Jingxiu Ding, Shanghai, CN;

Zuopeng He, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/544 (2006.01); H01L 21/68 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/544 (2013.01); H01L 21/68 (2013.01); H01L 24/03 (2013.01); H01L 24/09 (2013.01); H01L 24/89 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2224/03618 (2013.01); H01L 2224/05111 (2013.01); H01L 2224/05113 (2013.01); H01L 2224/05116 (2013.01); H01L 2224/05139 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/8013 (2013.01); H01L 2224/80203 (2013.01); H01L 2224/80801 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06593 (2013.01); H01L 2924/0132 (2013.01); H01L 2924/0133 (2013.01); H01L 2924/20104 (2013.01); H01L 2924/20105 (2013.01); H01L 2924/20106 (2013.01); H01L 2924/20107 (2013.01); H01L 2924/20108 (2013.01); H01L 2924/20109 (2013.01);
Abstract

Semiconductor structure and fabrication methods are provided. The semiconductor structure includes a first wafer having a first metal layer therein and having a first material layer thereon, and a second wafer having a second metal layer therein and having a second material layer thereon. An alignment process and a bonding process are preformed between the first wafer and the second wafer, such that the first material layer and the second material layer are aligned and in contact with one another to provide a first alignment accuracy between the first metal layer and second metal layer. A heating process is performed on the first material layer and the second material layer to melt the first material layer and the second material layer to provide a second alignment accuracy between the first metal layer and second metal layer. The second alignment accuracy is greater than the first alignment accuracy.


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