The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 29, 2017

Filed:

May. 06, 2016
Applicant:

Macronix International Co., Ltd., Hsinchu, TW;

Inventors:

Yu Wei Jiang, Hsinchu, TW;

Teng Hao Yeh, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/74 (2006.01); H01L 29/80 (2006.01); H01L 29/76 (2006.01); H01L 21/00 (2006.01); H01L 21/338 (2006.01); H01L 21/8238 (2006.01); H01L 21/336 (2006.01); H01L 27/11582 (2017.01); H01L 29/04 (2006.01); H01L 29/16 (2006.01); H01L 23/528 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 27/11565 (2017.01); H01L 21/762 (2006.01); H01L 21/3213 (2006.01); H01L 21/28 (2006.01); H01L 21/02 (2006.01); H01L 21/311 (2006.01); H01L 21/306 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 21/02532 (2013.01); H01L 21/02595 (2013.01); H01L 21/28282 (2013.01); H01L 21/30604 (2013.01); H01L 21/30625 (2013.01); H01L 21/31111 (2013.01); H01L 21/32133 (2013.01); H01L 21/76224 (2013.01); H01L 23/528 (2013.01); H01L 27/11565 (2013.01); H01L 29/04 (2013.01); H01L 29/0649 (2013.01); H01L 29/16 (2013.01); H01L 29/66545 (2013.01);
Abstract

A semiconductor structure and a manufacturing method are provided. The semiconductor structure includes a substrate, conductive layers, insulating layers, a memory structure including first memory structure clusters and second memory structure clusters, isolation trenches, and common source trenches. The conductive layers and the insulating layers are interlaced and stacked on the substrate. Each first memory structure cluster include first memory structures and each first memory structure cluster include second memory structures. The first and second memory structures penetrate the conductive layers and the insulating layers. Each isolation trench is formed between a first memory structure cluster and a second memory structure cluster. The isolation trenches span horizontally on the substrate in a discontinuous manner separated by gaps. Common source trenches are formed on the substrate that run substantially parallel with the isolation trenches.


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