The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 29, 2017

Filed:

Mar. 27, 2015
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Oren Ben-Kiki, Tel-Aviv, IL;

Ilan Pardo, Ramat-Hasharon, IL;

Arch D. Robison, Champaign, IL (US);

James H. Cownie, Bristol, GB;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/10 (2016.01); G06F 9/38 (2006.01); G06F 12/0875 (2016.01); G06F 12/0811 (2016.01); G06F 9/30 (2006.01);
U.S. Cl.
CPC ...
G06F 9/3822 (2013.01); G06F 9/3009 (2013.01); G06F 9/3806 (2013.01); G06F 9/3877 (2013.01); G06F 12/0811 (2013.01); G06F 12/0875 (2013.01); G06F 2212/283 (2013.01); G06F 2212/452 (2013.01);
Abstract

A processor of an aspect includes a plurality of processor elements, and a first processor element. The first processor element may perform a user-level fork instruction of a software thread. The first processor element may include a decoder to decode the user-level fork instruction. The user-level fork instruction is to indicate at least one instruction address. The first processor element may also include a user-level thread fork module. The user-level fork module, in response to the user-level fork instruction being decoded, may configure each of the plurality of processor elements to perform instructions in parallel. Other processors, methods, systems, and instructions are disclosed.


Find Patent Forward Citations

Loading…