The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 22, 2017

Filed:

Apr. 07, 2016
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Kung-Hong Lee, Pingtung County, TW;

Chun-Jung Tang, Tainan, TW;

Te-Chih Chen, Kaohsiung, TW;

Tai-Ju Chen, Tainan, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/16 (2006.01); H01L 29/161 (2006.01); H01L 29/167 (2006.01); H01L 29/24 (2006.01); H01L 29/165 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66795 (2013.01); H01L 29/161 (2013.01); H01L 29/167 (2013.01); H01L 29/1608 (2013.01); H01L 29/24 (2013.01); H01L 29/66636 (2013.01); H01L 29/785 (2013.01); H01L 29/7848 (2013.01); H01L 29/165 (2013.01);
Abstract

The present invention provides a method of forming a metal oxide semiconductor (MOS) device comprising a gate structure and an epitaxial structure. The gate structure is disposed on a substrate. The epitaxial structure is disposed in the substrate at two sides of the gate structure and a part thereof serves a source/drain of the MOS, wherein the epitaxial structure comprises: a first buffer layer with a second conductive type, a second buffer layer, and an epitaxial layer with a first conductive type complementary to the second conductive type. The present invention further provides a method of forming the same.


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