The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 22, 2017
Filed:
Jan. 21, 2016
Tower Semiconductor Ltd., Migdal Haemek, IL;
Michael Lisiansky, Afula, IL;
Amos Fenigstein, Haifa, IL;
Yakov Roizin, Afula, IL;
Hironori Matsuyoshi, Hyogo, JP;
Toshiaki Ohmi, Hyogo, JP;
TOWER SEMICONDUCTOR LTD., Migdal Haemek, IL;
Abstract
A method for manufacturing a metal insulator metal (MIM) trench capacitor, the method may include forming a cavity in an Intermetal Dielectric stack, wherein a bottom of the cavity exposes a lower metal layer; wherein the Intermetal Dielectric stack comprises a top dielectric layer; depositing a first metal layer on a bottom of a cavity and on sidewalls of the cavity; depositing a sacrificial layer over the first metal layer; filling the cavity with a filling material; removing, by a planarization process, a portion of the sacrificial layer positioned above the top dielectric layer and a portion of the first metal layer positioned above the top dielectric layer to expose an upper portion of the sacrificial layer and an upper portion of the first metal layer; forming a recess by removing the upper portion of the sacrificial layer and the upper portion the first metal layer while using the filling material as a mask; removing the filling material by a first removal process that is selective to the sacrificial layer and to the first metal layer; removing the sacrificial layer by a second removal process that is less aggressive than the first removal process; fabricating an insulator layer on the first metal layer; and depositing a second metal layer on the insulator layer.