The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 22, 2017
Filed:
Mar. 15, 2013
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Christopher J. Hughes, Santa Clara, CA (US);
Daehyun Kim, San Jose, CA (US);
Jong Soo Park, Santa Clara, CA (US);
Richard M Yoo, Stanford, CA (US);
Ganesh Bikshandi, Bangalore, IN;
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2016.01); G06F 12/12 (2016.01); G06F 12/02 (2006.01); G06F 12/0891 (2016.01); G06F 12/127 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0891 (2013.01); G06F 12/127 (2013.01); G06F 12/023 (2013.01); Y02B 60/1225 (2013.01);
Abstract
A processing device comprises a processing device cache and a cache controller. The cache controller initiates a cache line eviction process and determines determine an object liveness value associated with a cache line in the processing device cache. The cache controller applies the object liveness value to a cache line eviction policy and evicts the cache line from the processing device cache based on the object liveness value and the cache line eviction policy.