The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 15, 2017
Filed:
Aug. 24, 2015
Applicant:
Silego Technology, Inc., Santa Clara, CA (US);
Inventors:
Assignee:
Silego Technology, Inc., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/304 (2006.01); H01L 23/29 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 23/495 (2006.01); H01L 23/00 (2006.01); H01L 23/544 (2006.01); H01L 21/683 (2006.01);
U.S. Cl.
CPC ...
H01L 21/304 (2013.01); H01L 21/561 (2013.01); H01L 21/6836 (2013.01); H01L 23/293 (2013.01); H01L 23/3142 (2013.01); H01L 23/49548 (2013.01); H01L 23/544 (2013.01); H01L 24/97 (2013.01); H01L 21/568 (2013.01); H01L 23/3107 (2013.01); H01L 2221/6834 (2013.01); H01L 2221/68327 (2013.01); H01L 2223/54433 (2013.01); H01L 2223/54486 (2013.01); H01L 2224/16245 (2013.01); H01L 2924/181 (2013.01);
Abstract
Techniques for achieving extremely thin package structures are disclosed. In some embodiments, a device comprises an integrated circuit connected to a leadframe or substrate via connections and EMC (Epoxy Molding Compound) surrounding the integrated circuit except at a backside of the integrated circuit and connecting areas via which the integrated circuit is connected to the leadframe or substrate.