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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9728424 B1

PDFFull Text
Date of Patent:
Aug. 08, 2017

Filed:

May. 28, 2015

Method of fabricating a packaged integrated circuit with through-silicon via an inner substrate

Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Ji-hwang Kim, Cheonan-si, KR;

Un-byoung Kang, Hwaseong-si, KR;

Cha-jea Jo, Incheon, KR;

Tae-je Cho, Yongin-si, KR;

Assignee:

Samsung Electronics Co., Ltd., , KR;

Attorney:

Onello & Mello, LLP.

Primary Examiner:

Alonzo Chambliss

Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/48 (2006.01); B23K 31/02 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 23/14 (2006.01);
U.S. Cl.
CPC ...
H01L 21/486 (2013.01); H01L 21/563 (2013.01); H01L 23/49827 (2013.01); H01L 24/17 (2013.01); H01L 24/81 (2013.01); H01L 23/147 (2013.01); H01L 23/49816 (2013.01); H01L 24/32 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/181 (2013.01);
Abstract

A method of manufacturing a semiconductor package includes forming a bonding layer on a carrier substrate, bonding an inner substrate to the carrier substrate, removing the carrier substrate, and forming a gap-filling portion by removing a portion of the bonding layer to expose a portion of a solder ball provided in the inner substrate. The inner substrate may be mounted on a package substrate and a semiconductor chip may be mounted on the inner substrate.

Find Patent Forward Citations

Kim, Ji-hwang. (2017). Method of fabricating a packaged integrated circuit with through-silicon via an inner substrate (U.S. Patent No. 9728424). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9728424

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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