The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 08, 2017
Filed:
Mar. 04, 2016
Kabushiki Kaisha Toshiba, Tokyo, JP;
Nobuhiro Tsuji, Yokohama Kanagawa, JP;
Kenichirou Kada, Yokohama Kanagawa, JP;
Shinya Takeda, Yokohama Kanagawa, JP;
Toshihiko Kitazume, Kawasaki Kanagawa, JP;
Shunsuke Kodera, Yokohama Kanagawa, JP;
Tetsuya Iwata, Yokohama Kanagawa, JP;
Yoshio Furuyama, Yokosuka Kanagawa, JP;
Hirosuke Narai, Tokyo, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
A memory system includes a plurality of pins for connection to the outside of the memory system, one of the pins being configured to receive a command signal, a memory cell array including a plurality of first memory blocks and a second memory block in which status data indicating which of the first memory blocks is defective, is stored, and a control circuit configured to determine whether or not a first memory block targeted by the command signal is indicated as being defective in the status data. The control circuit allows an operation to be performed on the targeted first memory block in accordance with the command signal when the targeted first memory block is not indicated as being defective, and blocks the operation to be performed on the targeted first memory block when the targeted first memory block is indicated as being defective.