The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2017

Filed:

Dec. 18, 2014
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Yoni Landau, Or-Aqiva, IL;

Assaf Benhamou, Haifa, IL;

Adee O. Ran, Maayan Baruch, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 12/12 (2006.01); H04J 3/06 (2006.01); H04L 7/04 (2006.01);
U.S. Cl.
CPC ...
H04J 3/0658 (2013.01); H04L 12/12 (2013.01); H04L 7/041 (2013.01); H04L 2007/045 (2013.01); Y02B 60/34 (2013.01); Y02B 60/35 (2013.01);
Abstract

Technologies for robust data transmission include a network port logic having a physical coding sublayer (PCS). The PCS may transmit a series of rapid alignment markers (RAMs) to a link partner, with each RAM indicative of a counter value. The PCS transitions to a sleep state if the counter value equals two and a low power idle (LPI) command is set by an upper-layer client. The PCS transitions to an active state if the counter value equals one and the LPI command is not set. The PCS may receive a low power idle symbol (LI) from the link partner and start a guard timer in response to receipt of the LI symbol. The PCS transitions to a sleep state if the guard timer expires and transitions to the active state if data other than LI is received prior to expiration of the guard timer. Other embodiments are described and claimed.


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