The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 01, 2017
Filed:
Apr. 28, 2016
Freescale Semiconductor, Inc., Austin, TX (US);
NXP USA, INC., Austin, TX (US);
Abstract
A packaged IC device in which a die is sandwiched between first and second substrates such that (i) peripheral electrical contact pads of the die are wire bonded to the first substrate, e.g., for routing functional input/output signals, and (ii) core-area electrical contact pads of the die are connected to the second substrate in a flip-chip arrangement, e.g., for routing one or more power supply voltages to the core area of the die. The second substrate has a shape and position that (i) expose the peripheral electrical contact pads of the die for unencumbered machine-implemented wire bonding during the assembly process, and (ii) enable direct electrical connections between the first and second substrates outside the footprint of the die, e.g., by way of the corresponding solder bumps attached between the two substrates.