The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2017

Filed:

Mar. 20, 2015
Applicant:

Hgst Netherlands B.v., Amsterdam, NL;

Inventors:

Seyhan Karakulak, San Diego, CA (US);

Anthony Dwayne Weathers, San Diego, CA (US);

Richard David Barndt, San Diego, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/34 (2006.01); G06F 11/07 (2006.01); G06F 12/00 (2006.01); G11C 8/14 (2006.01); G11C 11/56 (2006.01); G11C 16/08 (2006.01); G11C 16/26 (2006.01); G11C 29/02 (2006.01); G11C 29/52 (2006.01);
U.S. Cl.
CPC ...
G06F 11/076 (2013.01); G06F 11/073 (2013.01); G06F 11/079 (2013.01); G06F 11/0793 (2013.01); G06F 12/00 (2013.01); G11C 8/14 (2013.01); G11C 11/5628 (2013.01); G11C 16/08 (2013.01); G11C 16/26 (2013.01); G11C 16/349 (2013.01); G11C 16/3418 (2013.01); G11C 16/3495 (2013.01); G11C 29/021 (2013.01); G11C 29/028 (2013.01); G11C 29/52 (2013.01);
Abstract

A table of error counts is generated based on reading wordlines of a flash memory device, the table storing an error count for each combination of wordline and respective read level voltage used to read the wordlines. A plurality of offset wordline groups are generated based on the table of error counts, with each group associating a different read level offset voltage with a plurality of wordline addresses. A storage device is configured to read memory cells using a read level offset voltage of a generated offset wordline group associated with a wordline address of the memory cells to be read. After a predetermined point in a life cycle of a respective memory block, the table is regenerated and plurality of offset wordline groups are regenerated based the regenerated table of error counts.


Find Patent Forward Citations

Karakulak, Seyhan. (2017). Read level grouping for increased flash performance (U.S. Patent No. 9720754). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9720754

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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