The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2017

Filed:

Dec. 16, 2011
Applicants:

Jonathan D. Mohn, Saratoga, CA (US);

Harald Te Nijenhuis, San Jose, CA (US);

Shawn M. Hamilton, Boulder Creek, CA (US);

Kevin Madrigal, Santa Cruz, CA (US);

Ramkishan Rao Lingampalli, Fremont, CA (US);

Inventors:

Jonathan D. Mohn, Saratoga, CA (US);

Harald te Nijenhuis, San Jose, CA (US);

Shawn M. Hamilton, Boulder Creek, CA (US);

Kevin Madrigal, Santa Cruz, CA (US);

Ramkishan Rao Lingampalli, Fremont, CA (US);

Assignee:

Novellus Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/687 (2006.01); H01L 21/67 (2006.01); C23C 16/458 (2006.01); C23C 16/40 (2006.01); C23C 16/455 (2006.01); C23C 16/46 (2006.01);
U.S. Cl.
CPC ...
C23C 16/401 (2013.01); C23C 16/4585 (2013.01); C23C 16/4586 (2013.01); C23C 16/45565 (2013.01); C23C 16/45574 (2013.01); C23C 16/463 (2013.01); H01L 21/6719 (2013.01); H01L 21/67109 (2013.01); H01L 21/68785 (2013.01); H01L 21/68792 (2013.01); Y10T 279/34 (2015.01);
Abstract

Electronic device fabrication processes, apparatuses and systems for flowable gap fill or flowable deposition techniques are described. In some implementations, a semiconductor fabrication chamber is described which is configured to maintain a semiconductor wafer at a temperature near 0° C. while maintaining most other components within the fabrication chamber at temperatures on the order of 5-10° C. or higher than the wafer temperature.


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