The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 25, 2017

Filed:

Sep. 30, 2015
Applicant:

Rambus Inc., Sunnyvale, CA (US);

Inventors:

Mehrdad Ramezani, Toronto, CA;

David J. Cassan, Toronto, CA;

Christopher D. Holdenried, Toronto, CA;

Sang-Wook Paul Park, Toronto, CA;

Marcus van Ierssel, Ontario, CA;

Assignee:

Rambus Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/00 (2006.01); H04L 25/03 (2006.01); H04L 7/033 (2006.01);
U.S. Cl.
CPC ...
H04L 7/0087 (2013.01); H04L 7/0029 (2013.01); H04L 7/0331 (2013.01); H04L 25/03057 (2013.01);
Abstract

A clock and data recovery circuit (CDR) includes a digitally controlled oscillator (DCO). A data sampler is coupled to receive a clock signal from the DCO. A deserializer includes an input coupled to an output of the data sampler. A first phase detector is coupled between a first output of the deserializer and a first input of the DCO. A second phase detector is coupled to a second output of the deserializer. An accumulator is coupled between an output of the second phase detector and a second input of the DCO. A frequency lock detection block is coupled to an output of the accumulator. An eye monitor is coupled to an input of the data sampler. The first phase detector controls a delay of the DCO and the accumulator controls a frequency of the DCO. An edge mute signal is coupled to the deserializer.


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