The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 25, 2017
Filed:
Aug. 21, 2015
Freescale Semiconductor, Inc., Austin, TX (US);
Chad S. Dawson, Queen Creek, AZ (US);
Andrew C. McNeil, Chandler, AZ (US);
Jinbang Tang, Chandler, AZ (US);
NXP USA, INC., Austin, TX (US);
Abstract
Electrically conductive barriers for integrated circuits and integrated circuits and methods including the electrically conductive barriers. The integrated circuits include a semiconductor substrate, a semiconductor device supported by a device portion of the substrate, and a plurality of bond pads supported by a bond pad portion of the substrate. The integrated circuits also include an electrically conductive barrier that projects away from an intermediate portion of the substrate and is configured to decrease capacitive coupling between the device portion and the bond pad portion. The methods can include methods of manufacturing an integrated circuit. These methods include forming a semiconductor device, forming a plurality of bond pads, forming a plurality of electrically conductive regions, and forming an electrically conductive barrier. The methods also can include methods of operating an integrated circuit. These methods include applying an input electric signal, receiving an output electric signal, and applying a reference potential.