The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 18, 2017
Filed:
Jan. 21, 2015
Applicant:
At&s Austria Technologie & Systemtechnik Aktiengesellschaft, Leoben, AT;
Inventors:
Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/03 (2006.01); H05K 1/02 (2006.01); H01L 33/60 (2010.01); H05K 1/18 (2006.01); H05K 3/00 (2006.01); H01L 33/62 (2010.01); H05K 3/22 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0274 (2013.01); H01L 33/60 (2013.01); H01L 33/62 (2013.01); H05K 1/183 (2013.01); H05K 3/0026 (2013.01); H05K 3/0044 (2013.01); H05K 3/0055 (2013.01); H05K 3/22 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2933/0058 (2013.01); H01L 2933/0066 (2013.01); H05K 2201/09036 (2013.01); H05K 2201/10106 (2013.01); H05K 2201/2054 (2013.01); H05K 2203/308 (2013.01);
Abstract
Method for the manufacture of a printed circuit board with at least one cavity for the accommodation of an electronic component, wherein the cavity walls exhibit a reflective, in particular mirrored reflector layer characterized by the following steps: Provision of a printed circuit board, Application of a temporary protective layer onto at least a section of the surface of the circuit board, Creation of the cavity by way of penetration of the protective layer in the region of the cavity, Application of the reflector layer, Removal of the temporary protective layer.