Locally-trap-characteristic-enhanced charge trap layer for three-dimensional memory structures

Abstract

Threshold voltage shift due to programming of a neighboring memory element can be reduced or suppressed by forming a compositionally modulated charge storage layer in a three-dimensional memory device. The compositionally modulated charge storage layer can be formed by providing an oxygen-containing dielectric silicon compound layer outside a tunneling dielectric layer, and subsequently nitriding portions of the oxygen-containing dielectric silicon compound layer only at levels of the control gate electrodes. An alternating stack of sacrificial material layers and insulating layers can be employed to form a memory stack structure therethrough. After removal of the sacrificial material layers, a nitridation process can be performed to convert physically exposed portions of the oxygen-containing dielectric silicon compound layer into silicon nitride portions, which are vertically spaced from one another by remaining oxygen-containing dielectric silicon compound portions that have inferior charge trapping property to the silicon nitride portions.