The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 18, 2017
Filed:
Aug. 25, 2016
Kabushiki Kaisha Toshiba, Minato-ku, JP;
Takeshi Sonehara, Yokkaichi, JP;
Masaru Kito, Kuwana, JP;
KABUSHIKI KAISHA TOSHIBA, Minato-ku, JP;
Abstract
A method of manufacturing a semiconductor memory device according to an embodiment comprises: alternately stacking first inter-layer insulating layers and first layers above a substrate; forming a first opening penetrating the layers stacked above the substrate; and forming a gate insulating layer and a semiconductor layer in the first opening. In addition, the method comprises: forming a second opening penetrating the layers stacked above the substrate; and forming a second inter-layer insulating layer on an inner wall of the second opening. Moreover, the method comprises: forming a first silicide layer and a barrier metal layer on the bottom surface of the second opening; and forming a silicon layer in the second opening such that a crevice is formed in an upper surface of the silicon layer along the second opening. Furthermore, the method comprises: removing part of the silicon layer; and siliciding the silicon layer via the crevice.