The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 18, 2017
Filed:
Dec. 12, 2014
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Vladimir Tamarkin, Huntington Valley, PA (US);
Wayne Genetti, Sanatoga, PA (US);
David Schweitzer, Collegeville, PA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/16 (2006.01); H01R 12/72 (2011.01); G06F 13/42 (2006.01); H01R 12/73 (2011.01); H05K 1/14 (2006.01); G06F 1/18 (2006.01); H05K 7/14 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4282 (2013.01); G06F 1/185 (2013.01); G06F 1/186 (2013.01); G06F 13/409 (2013.01); G06F 13/4022 (2013.01); H01R 12/721 (2013.01); H01R 12/727 (2013.01); H01R 12/73 (2013.01); H01R 12/737 (2013.01); H05K 1/145 (2013.01); H05K 7/1422 (2013.01); G06F 2213/0026 (2013.01);
Abstract
Some embodiments include apparatus and methods having a circuit board, a device located on the circuit board, a first Peripheral Component Interconnect Express (PCIe) connector located on the circuit board and coupled to the device, and a second PCIe connector located on the circuit board and coupled to the device. The first PCIe connector is arranged to couple to a first connector of an additional circuit board. The second PCIe connector is arranged to couple to a second connector of the additional circuit board.