The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 18, 2017
Filed:
Nov. 03, 2014
Chanpreet Singh, SAS Nagar, IN;
Kshitij Bajaj, Sirsa, IN;
Abhineet Kumar Bhojak, Noida, IN;
Anisha Ladsaria, Noida, IN;
Tejbal Prasad, Greater Noida, IN;
Chanpreet Singh, SAS Nagar, IN;
Kshitij Bajaj, Sirsa, IN;
Abhineet Kumar Bhojak, Noida, IN;
Anisha Ladsaria, Noida, IN;
Tejbal Prasad, Greater Noida, IN;
NXP USA, INC., Austin, TX (US);
Abstract
An asynchronous data transfer system includes a bus interface unit (BIU), a FIFO write logic module, a write pointer synchronizer, a write pointer validator, a FIFO read logic module, and an asynchronous FIFO buffer. The FIFO buffer receives a variable size data from the BIU and stores the variable size data at a write address. The FIFO write logic module generates a write pointer by encoding the write address using a Johnson code. The FIFO read logic module receives a synchronized write pointer at the asynchronous clock domain and generates a read address signal when the synchronized write pointer is a valid Johnson code format. The FIFO buffer transfers the variable size data to a processor based on the read address signal.